Thermomechanical Finite Element Analysis of Problems in lectronic Packaging Using theE Disturbed State Concept: Part 2---Verification and Application
نویسندگان
چکیده
The finite element procedure with the unified disturbed state modeling concept presented in Part I, Basaran et al. (1998), is verified here with respect to laboratory test results for Pb40/Sn60 eutectic solder alloy. This solder alloy is a commonly used interconnection material for surface mount technology packages. It is demonstrated that the proposed procedure provides highly satisfactory correlation with the observed laboratory behavior of materials and with test results for a chip-substrate system simulated in the laboratory.
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